9:e6fa4e9b4e4f
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2017-05-14 |
Paul Boddie |
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Introduced interrupt and exception initialisation fixes plus a revised state
machine for signal generation and use of two output compare units for the sync
pulses. This does generate a signal but refinement is needed.
Moved framebuffer initialisation to a point where it does not cause an exception
for some undiagnosed reason. |
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mips.h pic32.h vga.S vga.ld
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8:c2f73f8a609c
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2017-05-11 |
Paul Boddie |
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Update the DMA source address without disabling the channel. |
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vga.S
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7:1d1a968f269a
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2017-05-11 |
Paul Boddie |
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Added support for updating the line data address after every other transfer. |
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vga.S
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6:99c45884949c
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2017-05-11 |
Paul Boddie |
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Added line address variable (to be used) and adjusted IRQ label names. |
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vga.S
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5:2bde94e148b6
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2017-05-10 |
Paul Boddie |
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Introduced output compare usage with Timer2 to generate the hsync pulse for each
active display line, removing the non-line DMA channels and initiating each line
channel transfer with the end of each hsync pulse. |
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pic32.h vga.S
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4:3f2be9f9433e
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2017-05-10 |
Paul Boddie |
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Switch to Timer2 usage from Timer1. |
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pic32.h vga.S
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3:86fe4c03b489
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2017-05-10 |
Paul Boddie |
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Tidied and incorporated some aspects of working PMP and DMA tests. |
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vga.S
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2:0cf01717e7ef
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2017-05-10 |
Paul Boddie |
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Added some definitions for memory areas and DMA. |
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mips.h pic32.h
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1:dc5f9ac2fa26
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2017-05-07 |
Paul Boddie |
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Introduced the framework implementing different vertical signal periods. |
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vga.S
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0:71d6504cb824
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2017-05-06 |
Paul Boddie |
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An attempt to produce VGA output signals with a PIC32 device. |
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Makefile mips.h pic32.h vga.S vga.ld
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