VGAPIC32

pic32.h

10:4a66779421fc
2017-05-14 Paul Boddie Simplified the horizontal line details; introduced bus arbitration mode 2 usage.
     1 #ifndef __PIC32_H__     2 #define __PIC32_H__     3      4 /* See...     5  * TABLE 4-1: SFR MEMORYMAP     6  * TABLE 11-3: PORTA REGISTER MAP     7  * 11.2 CLR, SET and INV Registers     8  * PIC32MX1XX/2XX 28/36/44-pin Family Data Sheet     9  */    10     11 #define OC1CON	0xBF803000    12 #define OC1R	0xBF803010    13 #define OC1RS	0xBF803020    14 #define OC2CON	0xBF803200    15 #define OC2R	0xBF803210    16 #define OC2RS	0xBF803220    17 #define OC3CON	0xBF803400    18 #define OC3R	0xBF803410    19 #define OC3RS	0xBF803420    20     21 #define T1CON   0xBF800600    22 #define TMR1    0xBF800610    23 #define PR1     0xBF800620    24 #define T2CON   0xBF800800    25 #define TMR2    0xBF800810    26 #define PR2     0xBF800820    27     28 #define PMCON 	0xBF807000    29 #define PMMODE	0xBF807010    30 #define PMADDR	0xBF807020    31 #define PMDOUT	0xBF807030    32 #define PMDIN 	0xBF807040    33 #define PMAEN 	0xBF807050    34 #define PMSTAT	0xBF807060    35     36 #define OSCCON	0xBF80F000    37 #define CFGCON	0xBF80F200    38 #define SYSKEY	0xBF80F230    39     40 #define RPB4R	0xBF80FB3C    41 #define RPB5R	0xBF80FB40    42 #define RPB10R	0xBF80FB54    43     44 #define INTCON	0xBF881000    45 #define IFS0	0xBF881030    46 #define IFS1	0xBF881040    47 #define IEC0	0xBF881060    48 #define IEC1	0xBF881070    49 #define IPC1	0xBF8810A0    50 #define IPC2	0xBF8810B0    51 #define IPC7	0xBF881100    52 #define IPC8	0xBF881110    53 #define IPC10	0xBF881130    54     55 #define BMXCON		0xBF882000    56 #define BMXDKPBA	0xBF882010    57 #define BMXDUDBA	0xBF882020    58 #define BMXDRMSZ	0xBF882040    59     60 #define DMACON		0xBF883000    61 #define DCH0CON		0xBF883060    62 #define DCH0ECON	0xBF883070    63 #define DCH0INT		0xBF883080    64 #define DCH0SSA		0xBF883090    65 #define DCH0DSA		0xBF8830A0    66 #define DCH0SSIZ	0xBF8830B0    67 #define DCH0DSIZ	0xBF8830C0    68 #define DCH0CSIZ	0xBF8830F0    69 #define DCH1CON		0xBF883120    70 #define DCH1ECON	0xBF883130    71 #define DCH1INT		0xBF883140    72 #define DCH1SSA		0xBF883150    73 #define DCH1DSA		0xBF883160    74 #define DCH1SSIZ	0xBF883170    75 #define DCH1DSIZ	0xBF883180    76 #define DCH1CSIZ	0xBF8831B0    77 #define DCH2CON		0xBF8831E0    78 #define DCH2ECON	0xBF8831F0    79 #define DCH2INT		0xBF883200    80 #define DCH2SSA		0xBF883210    81 #define DCH2DSA		0xBF883220    82 #define DCH2SSIZ	0xBF883130    83 #define DCH2DSIZ	0xBF883140    84 #define DCH2CSIZ	0xBF883170    85     86 #define ANSELA	0xBF886000    87 #define TRISA	0xBF886010    88 #define PORTA	0xBF886020    89 #define LATA	0xBF886030    90 #define ODCA	0xBF886040    91 #define ANSELB	0xBF886100    92 #define TRISB	0xBF886110    93 #define PORTB	0xBF886120    94 #define LATB	0xBF886130    95 #define ODCB	0xBF886140    96     97 #define CLR 0x4    98 #define SET 0x8    99 #define INV 0xC   100    101 #endif /* __PIC32_H__ */