1 #ifndef __PIC32_H__ 2 #define __PIC32_H__ 3 4 /* See... 5 * TABLE 4-1: SFR MEMORYMAP 6 * TABLE 11-3: PORTA REGISTER MAP 7 * 11.2 CLR, SET and INV Registers 8 * PIC32MX1XX/2XX 28/36/44-pin Family Data Sheet 9 */ 10 11 #define T1CON 0xBF800600 12 #define TMR1 0xBF800610 13 #define PR1 0xBF800620 14 15 #define PMCON 0xBF807000 16 #define PMMODE 0xBF807010 17 #define PMADDR 0xBF807020 18 #define PMDOUT 0xBF807030 19 #define PMDIN 0xBF807040 20 #define PMAEN 0xBF807050 21 #define PMSTAT 0xBF807060 22 23 #define OSCCON 0xBF80F000 24 #define CFGCON 0xBF80F200 25 #define SYSKEY 0xBF80F230 26 27 #define IFS0 0xBF881030 28 #define IFS1 0xBF881040 29 #define IEC0 0xBF881060 30 #define IEC1 0xBF881070 31 #define IPC1 0xBF8810A0 32 #define IPC7 0xBF881100 33 #define IPC8 0xBF881110 34 #define IPC10 0xBF881130 35 36 #define BMXCON 0xBF882000 37 #define BMXDRMSZ 0xBF882040 38 39 #define DMACON 0xBF883000 40 #define DCH0CON 0xBF883060 41 #define DCH0ECON 0xBF883070 42 #define DCH0INT 0xBF883080 43 #define DCH0SSA 0xBF883090 44 #define DCH0DSA 0xBF8830A0 45 #define DCH0SSIZ 0xBF8830B0 46 #define DCH0DSIZ 0xBF8830C0 47 #define DCH0CSIZ 0xBF8830F0 48 #define DCH1CON 0xBF883120 49 #define DCH1ECON 0xBF883130 50 #define DCH1INT 0xBF883140 51 #define DCH1SSA 0xBF883150 52 #define DCH1DSA 0xBF883160 53 #define DCH1SSIZ 0xBF883170 54 #define DCH1DSIZ 0xBF883180 55 #define DCH1CSIZ 0xBF8831B0 56 #define DCH2CON 0xBF8831E0 57 #define DCH2ECON 0xBF8831F0 58 #define DCH2INT 0xBF883200 59 #define DCH2SSA 0xBF883210 60 #define DCH2DSA 0xBF883220 61 #define DCH2SSIZ 0xBF883130 62 #define DCH2DSIZ 0xBF883140 63 #define DCH2CSIZ 0xBF883170 64 65 #define ANSELA 0xBF886000 66 #define TRISA 0xBF886010 67 #define PORTA 0xBF886020 68 #define LATA 0xBF886030 69 #define ODCA 0xBF886040 70 #define ANSELB 0xBF886100 71 #define TRISB 0xBF886110 72 #define PORTB 0xBF886120 73 #define LATB 0xBF886130 74 #define ODCB 0xBF886140 75 76 #define CLR 0x4 77 #define SET 0x8 78 #define INV 0xC 79 80 #endif /* __PIC32_H__ */