1.1 --- a/mips.h Sun May 07 19:27:37 2017 +0200
1.2 +++ b/mips.h Wed May 10 00:07:28 2017 +0200
1.3 @@ -1,6 +1,9 @@
1.4 #ifndef __MIPS_H__
1.5 #define __MIPS_H__
1.6
1.7 +#define KSEG0_BASE 0x80000000
1.8 +#define KSEG1_BASE 0xA0000000
1.9 +
1.10 #define CP0_INDEX $0
1.11 #define CP0_ENTRYLO0 $2
1.12 #define CP0_ENTRYLO1 $3
2.1 --- a/pic32.h Sun May 07 19:27:37 2017 +0200
2.2 +++ b/pic32.h Wed May 10 00:07:28 2017 +0200
2.3 @@ -31,10 +31,37 @@
2.4 #define IPC1 0xBF8810A0
2.5 #define IPC7 0xBF881100
2.6 #define IPC8 0xBF881110
2.7 +#define IPC10 0xBF881130
2.8
2.9 #define BMXCON 0xBF882000
2.10 #define BMXDRMSZ 0xBF882040
2.11
2.12 +#define DMACON 0xBF883000
2.13 +#define DCH0CON 0xBF883060
2.14 +#define DCH0ECON 0xBF883070
2.15 +#define DCH0INT 0xBF883080
2.16 +#define DCH0SSA 0xBF883090
2.17 +#define DCH0DSA 0xBF8830A0
2.18 +#define DCH0SSIZ 0xBF8830B0
2.19 +#define DCH0DSIZ 0xBF8830C0
2.20 +#define DCH0CSIZ 0xBF8830F0
2.21 +#define DCH1CON 0xBF883120
2.22 +#define DCH1ECON 0xBF883130
2.23 +#define DCH1INT 0xBF883140
2.24 +#define DCH1SSA 0xBF883150
2.25 +#define DCH1DSA 0xBF883160
2.26 +#define DCH1SSIZ 0xBF883170
2.27 +#define DCH1DSIZ 0xBF883180
2.28 +#define DCH1CSIZ 0xBF8831B0
2.29 +#define DCH2CON 0xBF8831E0
2.30 +#define DCH2ECON 0xBF8831F0
2.31 +#define DCH2INT 0xBF883200
2.32 +#define DCH2SSA 0xBF883210
2.33 +#define DCH2DSA 0xBF883220
2.34 +#define DCH2SSIZ 0xBF883130
2.35 +#define DCH2DSIZ 0xBF883140
2.36 +#define DCH2CSIZ 0xBF883170
2.37 +
2.38 #define ANSELA 0xBF886000
2.39 #define TRISA 0xBF886010
2.40 #define PORTA 0xBF886020