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VGAPIC32
Shortlog
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-60
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2017-11-18
Paul Boddie
files
Introduced UART usage to obtain exception details.
2017-11-17
Paul Boddie
files
Update timer interrupt priorities atomically, removing disable/enable code.
2017-11-16
Paul Boddie
files
Reorganised interrupt handling to only test either timer or DMA interrupt
2017-11-07
Paul Boddie
files
Reordered channel and timer activation instructions, tidied generally.
2017-11-07
Paul Boddie
files
Employ a basic CPU priority and keep the timer interrupt enabled (but not at CPU
2017-11-07
Paul Boddie
files
Reordered channel and timer activation instructions, tidied generally.
2017-11-07
Paul Boddie
files
Reordered channel and timer activation instructions, tidied generally.
2017-11-07
Paul Boddie
files
Employ a basic CPU priority and keep the timer interrupt enabled (but not at CPU
2017-11-07
Paul Boddie
files
Employ a basic CPU priority and keep the timer interrupt enabled (but not at CPU
2017-11-06
Paul Boddie
files
Enable Timer3 interrupts in order to create timer events.
2017-11-06
Paul Boddie
files
Double the peripheral clock frequency for further timer usage.
2017-11-06
Paul Boddie
files
Removed superfluous interrupt handling.
2017-11-06
Paul Boddie
files
Disabled the reset channel interrupt which appears superfluous for chaining as
2017-11-06
Paul Boddie
files
Test usage of Timer3 to initiate the reset channel cell transfer.
2017-11-06
Paul Boddie
files
Test usage of Timer3 to initiate the reset channel cell transfer.
2017-11-06
Paul Boddie
files
Test usage of Timer3 to initiate the reset channel cell transfer.
2017-11-04
Paul Boddie
files
A tentative sketch of how OC3 might drive line DMA transfers and the clock pulse
2017-11-04
Paul Boddie
files
Make DMA channel 1 the line channel. Things will only now work if the Timer2
2017-11-04
Paul Boddie
files
Test chaining of DMA channels, adding one between the line and reset channels.
2017-11-04
Paul Boddie
files
Make DMA channel 1 the line channel. Things will only now work if the Timer2
CLKO-to-74HC273-CP
2017-11-04
Paul Boddie
files
Test chaining of DMA channels, adding one between the line and reset channels.
CLKO-to-74HC273-CP
2017-11-04
Paul Boddie
files
Simplify REFCLKO initialisation and set RODIV to 2 to test pixel uniformity.
CLKO-to-74HC273-CP
2017-11-04
Paul Boddie
files
Switch to REFCLKO instead of using CLKO and the primary oscillator.
CLKO-to-74HC273-CP
2017-11-04
Paul Boddie
files
Experiment with the use of CLKO providing the clock pulse of a flip-flop
CLKO-to-74HC273-CP
2017-11-03
Paul Boddie
files
Removed redundant operations such as loads whose values are already loaded.
2017-11-03
Paul Boddie
files
Removed redundant operations such as loads whose values are already loaded.
2017-11-03
Paul Boddie
files
Change the DMA channels used from 0 and 1 to 1 and 2.
2017-11-03
Paul Boddie
files
Fixed DMA channel 2 registers. Reformatted and added some more definitions.
2017-11-03
Paul Boddie
files
Fixed comments.
2017-09-29
Paul Boddie
files
Added some comments.
2017-06-03
Paul Boddie
files
Disable the timer interrupt in order to reduce memory contention with the line
2017-06-03
Paul Boddie
files
Disable the line channel only when its completion is being handled.
2017-06-03
Paul Boddie
files
Created a separate DMA address update routine. Note that it does not use $ra
2017-06-03
Paul Boddie
files
Simplified the interrupt handler slightly.
2017-06-03
Paul Boddie
files
Reset the DMA source address for the first line, even though it is not necessary
2017-06-03
Paul Boddie
files
Disable and re-enable the line channel when setting the source address, even
2017-05-30
Paul Boddie
files
Put character string, font and image data into separate files.
2017-05-30
Paul Boddie
files
Added a tool to generate font definitions from GNU Unifont definitions.
2017-05-28
Paul Boddie
files
Transition between the picture and the pattern.
2017-05-28
Paul Boddie
files
Added register and display state saving and retrieval in the interrupt handler.
2017-05-28
Paul Boddie
files
Write to KSEG0 instead of KSEG1.
2017-05-28
Paul Boddie
files
Moved the framebuffer copying routine into a separate function.
2017-05-28
Paul Boddie
files
Moved display definitions and framebuffer pattern generation to separate files.
2017-05-28
Paul Boddie
files
Initialise system state before starting interrupts, preventing exceptions caused
2017-05-28
Paul Boddie
files
Put the general exception handler in the proper location.
2017-05-22
Paul Boddie
files
Added a link to an article about the project.
2017-05-22
Paul Boddie
files
Added diagrams showing VGA signal, DMA transfer, and output circuit details.
2017-05-22
Paul Boddie
files
Fixed sync pin assignment details.
2017-05-22
Paul Boddie
files
Updated the circuit information.
2017-05-21
Paul Boddie
files
Added a test pattern generating routine.
2017-05-21
Paul Boddie
files
Fixed the number of visible display lines.
2017-05-19
Paul Boddie
files
Updated the image to feature dithering and more realistic colours.
2017-05-19
Paul Boddie
files
Use a suitable image for the I0RRGGBB representation.
2017-05-19
Paul Boddie
files
Added copyright and licensing information.
2017-05-18
Paul Boddie
files
Switched to using a I0RRGGBB colour representation.
2017-05-18
Paul Boddie
files
Added a tool for simple image conversion to the appropriate pixel data format.
2017-05-18
Paul Boddie
files
Test a 48MHz system clock, 24MHz peripheral clock, and 800 x 600 @ 60Hz output
2017-05-17
Paul Boddie
files
Added missing operations to enable and disable the line channel.
2017-05-17
Paul Boddie
files
Updated the documentation to indicate that RB6 is not available and that only
2017-05-17
Paul Boddie
files
Added example image data and a sync instruction that seems to help the CPU
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-60
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