paul@0 | 1 | /* |
paul@0 | 2 | * Ben NanoNote and Arduino USB Host shield communication. |
paul@0 | 3 | * |
paul@0 | 4 | * Copyright 2013 Paul Boddie |
paul@0 | 5 | * |
paul@0 | 6 | * SPI functions derived from those in lib/atben.c by Werner Almesberger: |
paul@0 | 7 | * |
paul@0 | 8 | * Copyright 2010-2011 Werner Almesberger |
paul@0 | 9 | * |
paul@0 | 10 | * This program is free software; you can redistribute it and/or modify |
paul@0 | 11 | * it under the terms of the GNU General Public License as published by |
paul@0 | 12 | * the Free Software Foundation; either version 2 of the License, or |
paul@0 | 13 | * (at your option) any later version. |
paul@0 | 14 | */ |
paul@0 | 15 | |
paul@0 | 16 | #include <ubb/ubb.h> |
paul@0 | 17 | #include <stdio.h> |
paul@8 | 18 | #include <signal.h> |
paul@8 | 19 | #include <stdlib.h> |
paul@0 | 20 | |
paul@0 | 21 | /* Pin assignments: |
paul@0 | 22 | * |
paul@0 | 23 | * Sniffer UBB Shield |
paul@0 | 24 | * ------- ---- ------ |
paul@0 | 25 | * DAT2 DAT2 9 (INT) |
paul@0 | 26 | * CD DAT3 10 (SS) |
paul@0 | 27 | * CMD CMD 7 (RESET) |
paul@0 | 28 | * VCC VDD VIN |
paul@0 | 29 | * CLK CLK 13 (SCLK) |
paul@0 | 30 | * GND GND GND |
paul@0 | 31 | * DAT0 DAT0 11 (MOSI) |
paul@0 | 32 | * DAT1 DAT1 12 (MISO) |
paul@0 | 33 | * 8 (GPX) (not assigned) |
paul@0 | 34 | */ |
paul@0 | 35 | |
paul@0 | 36 | #define MAX_RESET UBB_CMD |
paul@0 | 37 | #define MAX_SCLK UBB_CLK |
paul@0 | 38 | #define MAX_MOSI UBB_DAT0 |
paul@0 | 39 | #define MAX_MISO UBB_DAT1 |
paul@0 | 40 | #define MAX_INT UBB_DAT2 |
paul@0 | 41 | #define MAX_SS UBB_DAT3 |
paul@0 | 42 | |
paul@0 | 43 | /* MAX3421E definitions. */ |
paul@0 | 44 | |
paul@0 | 45 | #define MAX_REG_READ 0x00 |
paul@0 | 46 | #define MAX_REG_WRITE 0x02 |
paul@0 | 47 | |
paul@4 | 48 | #define MAX_REG_USBIRQ 13 |
paul@7 | 49 | #define MAX_REG_USBIEN 14 |
paul@0 | 50 | #define MAX_REG_USBCTL 15 |
paul@7 | 51 | #define MAX_REG_CPUCTL 16 |
paul@0 | 52 | #define MAX_REG_PINCTL 17 |
paul@0 | 53 | #define MAX_REG_REVISION 18 |
paul@7 | 54 | #define MAX_REG_HIRQ 25 |
paul@7 | 55 | #define MAX_REG_HIEN 26 |
paul@0 | 56 | #define MAX_REG_MODE 27 |
paul@7 | 57 | #define MAX_REG_HCTL 29 |
paul@0 | 58 | #define MAX_REG_HRSL 31 |
paul@0 | 59 | |
paul@4 | 60 | #define MAX_USBIRQ_OSCOKIRQ 1 |
paul@4 | 61 | #define MAX_USBIRQ_NOVBUSIRQ 32 |
paul@4 | 62 | #define MAX_USBIRQ_VBUSIRQ 64 |
paul@4 | 63 | |
paul@0 | 64 | #define MAX_USBCTL_PWRDOWN 16 |
paul@0 | 65 | #define MAX_USBCTL_CHIPRES 32 |
paul@0 | 66 | |
paul@7 | 67 | #define MAX_CPUCTL_IE 1 |
paul@7 | 68 | |
paul@0 | 69 | #define MAX_PINCTL_POSINT_LOW 0 |
paul@0 | 70 | #define MAX_PINCTL_POSINT_HIGH 4 |
paul@0 | 71 | #define MAX_PINCTL_INTLEVEL_EDGE 0 |
paul@0 | 72 | #define MAX_PINCTL_INTLEVEL_LEVEL 8 |
paul@0 | 73 | #define MAX_PINCTL_FDUPSPI_HALF 0 |
paul@0 | 74 | #define MAX_PINCTL_FDUPSPI_FULL 16 |
paul@0 | 75 | |
paul@7 | 76 | #define MAX_HIRQ_BUSEVENTIRQ 1 |
paul@7 | 77 | #define MAX_HIRQ_RWUIRQ 2 |
paul@7 | 78 | #define MAX_HIRQ_RCVDAVIRQ 4 |
paul@7 | 79 | #define MAX_HIRQ_SNDBAVIRQ 8 |
paul@7 | 80 | #define MAX_HIRQ_SUSDNIRQ 16 |
paul@7 | 81 | #define MAX_HIRQ_CONDETIRQ 32 |
paul@7 | 82 | #define MAX_HIRQ_FRAMEIRQ 64 |
paul@7 | 83 | #define MAX_HIRQ_HXFRDNIRQ 128 |
paul@7 | 84 | |
paul@7 | 85 | #define MAX_HIEN_CONDETIE 32 |
paul@7 | 86 | |
paul@0 | 87 | #define MAX_MODE_PERIPHERAL 0 |
paul@0 | 88 | #define MAX_MODE_HOST 1 |
paul@7 | 89 | #define MAX_MODE_LOWSPEED 2 |
paul@7 | 90 | #define MAX_MODE_SOFKAENAB 8 |
paul@0 | 91 | #define MAX_MODE_SEPIRQ_OFF 0 |
paul@0 | 92 | #define MAX_MODE_SEPIRQ_ON 16 |
paul@0 | 93 | #define MAX_MODE_DMPULLDN 64 |
paul@0 | 94 | #define MAX_MODE_DPPULLDN 128 |
paul@0 | 95 | |
paul@7 | 96 | #define MAX_HCTL_SAMPLEBUS 4 |
paul@7 | 97 | |
paul@7 | 98 | #define MAX_HRSL_JSTATUS 128 |
paul@7 | 99 | #define MAX_HRSL_KSTATUS 64 |
paul@7 | 100 | |
paul@0 | 101 | #define max_reg(n) ((uint8_t) (n << 3)) |
paul@0 | 102 | #define max_reg_read(n) (max_reg(n) | MAX_REG_READ) |
paul@0 | 103 | #define max_reg_write(n) (max_reg(n) | MAX_REG_WRITE) |
paul@0 | 104 | |
paul@0 | 105 | void spi_begin() |
paul@0 | 106 | { |
paul@0 | 107 | CLR(MAX_SS); |
paul@0 | 108 | } |
paul@0 | 109 | |
paul@0 | 110 | void spi_end() |
paul@0 | 111 | { |
paul@0 | 112 | SET(MAX_SS); |
paul@0 | 113 | } |
paul@0 | 114 | |
paul@0 | 115 | /** |
paul@0 | 116 | * Send the given value via MOSI while receiving a value via MISO. |
paul@0 | 117 | * This requires full-duplex SPI and will produce a status value for the first |
paul@0 | 118 | * value sent (the command). |
paul@0 | 119 | */ |
paul@0 | 120 | uint8_t spi_sendrecv(uint8_t v) |
paul@0 | 121 | { |
paul@0 | 122 | uint8_t result = 0; |
paul@0 | 123 | uint8_t mask; |
paul@0 | 124 | |
paul@0 | 125 | for (mask = 0x80; mask; mask >>= 1) |
paul@0 | 126 | { |
paul@0 | 127 | if (v & mask) |
paul@0 | 128 | { |
paul@7 | 129 | #ifdef DEBUG |
paul@0 | 130 | printf("1"); |
paul@7 | 131 | #endif |
paul@0 | 132 | SET(MAX_MOSI); |
paul@0 | 133 | } |
paul@0 | 134 | else |
paul@0 | 135 | { |
paul@7 | 136 | #ifdef DEBUG |
paul@0 | 137 | printf("0"); |
paul@7 | 138 | #endif |
paul@0 | 139 | CLR(MAX_MOSI); |
paul@0 | 140 | } |
paul@0 | 141 | |
paul@0 | 142 | /* Wait for stable output signal. */ |
paul@0 | 143 | |
paul@0 | 144 | SET(MAX_SCLK); |
paul@0 | 145 | |
paul@0 | 146 | if (PIN(MAX_MISO)) |
paul@0 | 147 | result |= mask; |
paul@0 | 148 | |
paul@0 | 149 | CLR(MAX_SCLK); |
paul@0 | 150 | } |
paul@0 | 151 | |
paul@7 | 152 | #ifdef DEBUG |
paul@0 | 153 | printf("\n"); |
paul@7 | 154 | #endif |
paul@0 | 155 | return result; |
paul@0 | 156 | } |
paul@0 | 157 | |
paul@6 | 158 | uint8_t max_read(uint8_t reg, uint8_t *status) |
paul@6 | 159 | { |
paul@6 | 160 | uint8_t result = 0, tmpstatus = 0; |
paul@6 | 161 | |
paul@6 | 162 | tmpstatus = 0; |
paul@6 | 163 | |
paul@6 | 164 | spi_begin(); |
paul@6 | 165 | tmpstatus = spi_sendrecv(max_reg_read(reg)); |
paul@6 | 166 | result = spi_sendrecv(0); |
paul@6 | 167 | spi_end(); |
paul@6 | 168 | |
paul@6 | 169 | if (status != NULL) |
paul@6 | 170 | *status = tmpstatus; |
paul@6 | 171 | |
paul@6 | 172 | return result; |
paul@6 | 173 | } |
paul@6 | 174 | |
paul@6 | 175 | uint8_t max_write(uint8_t reg, uint8_t value) |
paul@6 | 176 | { |
paul@6 | 177 | uint8_t status = 0; |
paul@6 | 178 | |
paul@6 | 179 | spi_begin(); |
paul@6 | 180 | status = spi_sendrecv(max_reg_write(reg)); |
paul@6 | 181 | spi_sendrecv(value); |
paul@6 | 182 | spi_end(); |
paul@6 | 183 | |
paul@6 | 184 | return status; |
paul@6 | 185 | } |
paul@6 | 186 | |
paul@3 | 187 | void chipreset() |
paul@3 | 188 | { |
paul@3 | 189 | printf("Resetting...\n"); |
paul@6 | 190 | max_write(MAX_REG_USBCTL, MAX_USBCTL_CHIPRES); |
paul@3 | 191 | |
paul@3 | 192 | printf("Clearing the reset...\n"); |
paul@6 | 193 | max_write(MAX_REG_USBCTL, 0); |
paul@3 | 194 | } |
paul@3 | 195 | |
paul@4 | 196 | uint8_t check() |
paul@4 | 197 | { |
paul@6 | 198 | uint8_t oscillator; |
paul@4 | 199 | |
paul@6 | 200 | oscillator = max_read(MAX_REG_USBIRQ, NULL); |
paul@4 | 201 | |
paul@4 | 202 | return (oscillator & ~(MAX_USBIRQ_NOVBUSIRQ | MAX_USBIRQ_VBUSIRQ)) == MAX_USBIRQ_OSCOKIRQ; |
paul@4 | 203 | } |
paul@4 | 204 | |
paul@7 | 205 | uint8_t wait() |
paul@7 | 206 | { |
paul@7 | 207 | uint16_t timeout = 1024; |
paul@7 | 208 | |
paul@7 | 209 | /* Wait for the oscillator before performing USB activity. */ |
paul@7 | 210 | |
paul@7 | 211 | printf("Waiting...\n"); |
paul@7 | 212 | |
paul@7 | 213 | while ((timeout > 0) && (!check())) |
paul@7 | 214 | { |
paul@7 | 215 | timeout--; |
paul@7 | 216 | } |
paul@7 | 217 | |
paul@7 | 218 | printf("Iterations remaining: %d\n", timeout); |
paul@7 | 219 | |
paul@7 | 220 | return timeout; |
paul@7 | 221 | } |
paul@7 | 222 | |
paul@11 | 223 | uint8_t samplebusready() |
paul@7 | 224 | { |
paul@7 | 225 | uint8_t result; |
paul@7 | 226 | |
paul@7 | 227 | result = max_read(MAX_REG_HCTL, NULL); |
paul@7 | 228 | |
paul@7 | 229 | return !(result & MAX_HCTL_SAMPLEBUS); |
paul@7 | 230 | } |
paul@7 | 231 | |
paul@11 | 232 | void samplebus() |
paul@11 | 233 | { |
paul@11 | 234 | max_write(MAX_REG_HCTL, MAX_HCTL_SAMPLEBUS); |
paul@11 | 235 | while (!samplebusready()); |
paul@11 | 236 | } |
paul@11 | 237 | |
paul@11 | 238 | void devicechanged() |
paul@11 | 239 | { |
paul@11 | 240 | uint8_t hrsl, mode; |
paul@11 | 241 | |
paul@11 | 242 | hrsl = max_read(MAX_REG_HRSL, NULL); |
paul@11 | 243 | mode = max_read(MAX_REG_MODE, NULL); |
paul@11 | 244 | |
paul@11 | 245 | if ((hrsl & MAX_HRSL_JSTATUS) && (hrsl & MAX_HRSL_KSTATUS)) |
paul@11 | 246 | { |
paul@11 | 247 | printf("Bad device status.\n"); |
paul@11 | 248 | } |
paul@11 | 249 | else if (!(hrsl & MAX_HRSL_JSTATUS) && !(hrsl & MAX_HRSL_KSTATUS)) |
paul@11 | 250 | { |
paul@11 | 251 | printf("Device disconnected.\n"); |
paul@11 | 252 | } |
paul@11 | 253 | else |
paul@11 | 254 | { |
paul@11 | 255 | printf("Device connected.\n"); |
paul@11 | 256 | |
paul@11 | 257 | /* Low speed device when J and lowspeed have the same level. |
paul@11 | 258 | Since J and K should have opposing levels, K can be tested when |
paul@11 | 259 | lowspeed is low. */ |
paul@11 | 260 | |
paul@11 | 261 | if (((hrsl & MAX_HRSL_JSTATUS) && (mode & MAX_MODE_LOWSPEED)) || |
paul@11 | 262 | ((hrsl & MAX_HRSL_KSTATUS) && !(mode & MAX_MODE_LOWSPEED))) |
paul@11 | 263 | { |
paul@11 | 264 | printf("Device is low speed.\n"); |
paul@11 | 265 | max_write(MAX_REG_MODE, MAX_MODE_HOST | MAX_MODE_SEPIRQ_OFF | MAX_MODE_DMPULLDN | MAX_MODE_DPPULLDN | MAX_MODE_LOWSPEED); |
paul@11 | 266 | } |
paul@11 | 267 | else |
paul@11 | 268 | { |
paul@11 | 269 | printf("Device is full speed.\n"); |
paul@11 | 270 | max_write(MAX_REG_MODE, MAX_MODE_HOST | MAX_MODE_SEPIRQ_OFF | MAX_MODE_DMPULLDN | MAX_MODE_DPPULLDN); |
paul@11 | 271 | } |
paul@11 | 272 | } |
paul@11 | 273 | } |
paul@11 | 274 | |
paul@8 | 275 | void shutdown(int signum) |
paul@8 | 276 | { |
paul@8 | 277 | printf("Closing...\n"); |
paul@8 | 278 | ubb_close(0); |
paul@8 | 279 | exit(1); |
paul@8 | 280 | } |
paul@8 | 281 | |
paul@0 | 282 | int main(int argc, char *argv[]) |
paul@0 | 283 | { |
paul@8 | 284 | uint8_t status = 0, revision = 0; |
paul@7 | 285 | uint16_t count; |
paul@0 | 286 | |
paul@8 | 287 | signal(SIGINT, &shutdown); |
paul@8 | 288 | |
paul@0 | 289 | if (ubb_open(0) < 0) { |
paul@0 | 290 | perror("ubb_open"); |
paul@0 | 291 | return 1; |
paul@0 | 292 | } |
paul@0 | 293 | |
paul@0 | 294 | ubb_power(1); |
paul@0 | 295 | printf("Power on.\n"); |
paul@0 | 296 | |
paul@0 | 297 | OUT(MAX_SS); |
paul@0 | 298 | OUT(MAX_MOSI); |
paul@0 | 299 | OUT(MAX_SCLK); |
paul@0 | 300 | OUT(MAX_RESET); |
paul@0 | 301 | IN(MAX_INT); |
paul@0 | 302 | IN(MAX_MISO); |
paul@0 | 303 | |
paul@0 | 304 | /* Initialise SPI. */ |
paul@7 | 305 | /* Set SS# to 1. */ |
paul@0 | 306 | |
paul@0 | 307 | SET(MAX_SS); |
paul@0 | 308 | CLR(MAX_MOSI); |
paul@0 | 309 | CLR(MAX_SCLK); |
paul@7 | 310 | SET(MAX_RESET); |
paul@0 | 311 | |
paul@0 | 312 | /* Initialise the MAX3421E. */ |
paul@0 | 313 | |
paul@0 | 314 | /* Set full-duplex, interrupt signalling. */ |
paul@0 | 315 | |
paul@0 | 316 | printf("Setting pin control...\n"); |
paul@6 | 317 | max_write(MAX_REG_PINCTL, MAX_PINCTL_INTLEVEL_LEVEL | MAX_PINCTL_FDUPSPI_FULL); |
paul@0 | 318 | |
paul@3 | 319 | chipreset(); |
paul@7 | 320 | printf("Ready? %d\n", wait()); |
paul@7 | 321 | |
paul@7 | 322 | /* Check various registers. */ |
paul@7 | 323 | |
paul@7 | 324 | printf("Mode: %x\n", max_read(MAX_REG_MODE, &status)); |
paul@7 | 325 | printf("IRQ: %x\n", max_read(MAX_REG_HIRQ, &status)); |
paul@0 | 326 | |
paul@0 | 327 | /* Set host mode. */ |
paul@0 | 328 | |
paul@0 | 329 | printf("Setting mode...\n"); |
paul@6 | 330 | status = max_write(MAX_REG_MODE, MAX_MODE_HOST | MAX_MODE_SEPIRQ_OFF | MAX_MODE_DMPULLDN | MAX_MODE_DPPULLDN); |
paul@7 | 331 | |
paul@7 | 332 | printf("Setting INT signalling...\n"); |
paul@7 | 333 | status = max_write(MAX_REG_CPUCTL, MAX_CPUCTL_IE); |
paul@7 | 334 | |
paul@7 | 335 | printf("Setting connection signalling...\n"); |
paul@7 | 336 | status = max_write(MAX_REG_HIEN, MAX_HIEN_CONDETIE); |
paul@7 | 337 | |
paul@7 | 338 | /* Check various registers. */ |
paul@7 | 339 | |
paul@7 | 340 | printf("Mode: %x\n", max_read(MAX_REG_MODE, &status)); |
paul@7 | 341 | printf("IRQ: %x\n", max_read(MAX_REG_HIRQ, &status)); |
paul@7 | 342 | printf("IE: %x\n", max_read(MAX_REG_HIEN, &status)); |
paul@7 | 343 | printf("CPU: %x\n", max_read(MAX_REG_CPUCTL, &status)); |
paul@7 | 344 | printf("Pin: %x\n", max_read(MAX_REG_PINCTL, &status)); |
paul@7 | 345 | printf("USBIRQ: %x\n", max_read(MAX_REG_USBIRQ, &status)); |
paul@7 | 346 | printf("USBIE: %x\n", max_read(MAX_REG_USBIEN, &status)); |
paul@0 | 347 | |
paul@0 | 348 | /* Read from the REVISION register. */ |
paul@0 | 349 | |
paul@0 | 350 | printf("Reading...\n"); |
paul@6 | 351 | revision = max_read(MAX_REG_REVISION, &status); |
paul@0 | 352 | printf("Revision = %x\n", revision); |
paul@7 | 353 | |
paul@8 | 354 | for (count = 0; count <= 65535; count++) |
paul@7 | 355 | { |
paul@8 | 356 | if (!PIN(MAX_INT)) |
paul@7 | 357 | { |
paul@9 | 358 | status = max_read(MAX_REG_HIRQ, NULL); |
paul@9 | 359 | |
paul@8 | 360 | if (status & MAX_HIRQ_CONDETIRQ) |
paul@11 | 361 | devicechanged(); |
paul@8 | 362 | if (status & MAX_HIRQ_SUSDNIRQ) |
paul@8 | 363 | printf("Suspend done.\n"); |
paul@8 | 364 | if (status & MAX_HIRQ_BUSEVENTIRQ) |
paul@8 | 365 | printf("Bus event.\n"); |
paul@8 | 366 | if (status & MAX_HIRQ_RCVDAVIRQ) |
paul@8 | 367 | printf("Data received.\n"); |
paul@7 | 368 | |
paul@8 | 369 | max_write(MAX_REG_HIRQ, status); |
paul@7 | 370 | } |
paul@7 | 371 | } |
paul@0 | 372 | |
paul@0 | 373 | printf("Closing...\n"); |
paul@0 | 374 | ubb_close(0); |
paul@0 | 375 | |
paul@0 | 376 | return 0; |
paul@0 | 377 | } |