paul@0 | 1 | /* |
paul@0 | 2 | * Ben NanoNote and Arduino USB Host shield communication. |
paul@0 | 3 | * |
paul@0 | 4 | * Copyright 2013 Paul Boddie |
paul@0 | 5 | * |
paul@0 | 6 | * SPI functions derived from those in lib/atben.c by Werner Almesberger: |
paul@0 | 7 | * |
paul@0 | 8 | * Copyright 2010-2011 Werner Almesberger |
paul@0 | 9 | * |
paul@0 | 10 | * This program is free software; you can redistribute it and/or modify |
paul@0 | 11 | * it under the terms of the GNU General Public License as published by |
paul@0 | 12 | * the Free Software Foundation; either version 2 of the License, or |
paul@0 | 13 | * (at your option) any later version. |
paul@0 | 14 | */ |
paul@0 | 15 | |
paul@0 | 16 | #include <ubb/ubb.h> |
paul@0 | 17 | #include <stdio.h> |
paul@0 | 18 | #include <time.h> |
paul@4 | 19 | #include <unistd.h> |
paul@0 | 20 | |
paul@0 | 21 | /* Pin assignments: |
paul@0 | 22 | * |
paul@0 | 23 | * Sniffer UBB Shield |
paul@0 | 24 | * ------- ---- ------ |
paul@0 | 25 | * DAT2 DAT2 9 (INT) |
paul@0 | 26 | * CD DAT3 10 (SS) |
paul@0 | 27 | * CMD CMD 7 (RESET) |
paul@0 | 28 | * VCC VDD VIN |
paul@0 | 29 | * CLK CLK 13 (SCLK) |
paul@0 | 30 | * GND GND GND |
paul@0 | 31 | * DAT0 DAT0 11 (MOSI) |
paul@0 | 32 | * DAT1 DAT1 12 (MISO) |
paul@0 | 33 | * 8 (GPX) (not assigned) |
paul@0 | 34 | */ |
paul@0 | 35 | |
paul@0 | 36 | #define MAX_RESET UBB_CMD |
paul@0 | 37 | #define MAX_SCLK UBB_CLK |
paul@0 | 38 | #define MAX_MOSI UBB_DAT0 |
paul@0 | 39 | #define MAX_MISO UBB_DAT1 |
paul@0 | 40 | #define MAX_INT UBB_DAT2 |
paul@0 | 41 | #define MAX_SS UBB_DAT3 |
paul@0 | 42 | |
paul@0 | 43 | /* MAX3421E definitions. */ |
paul@0 | 44 | |
paul@0 | 45 | #define MAX_REG_READ 0x00 |
paul@0 | 46 | #define MAX_REG_WRITE 0x02 |
paul@0 | 47 | |
paul@4 | 48 | #define MAX_REG_USBIRQ 13 |
paul@0 | 49 | #define MAX_REG_USBCTL 15 |
paul@0 | 50 | #define MAX_REG_PINCTL 17 |
paul@0 | 51 | #define MAX_REG_REVISION 18 |
paul@0 | 52 | #define MAX_REG_MODE 27 |
paul@0 | 53 | #define MAX_REG_HRSL 31 |
paul@0 | 54 | |
paul@4 | 55 | #define MAX_USBIRQ_OSCOKIRQ 1 |
paul@4 | 56 | #define MAX_USBIRQ_NOVBUSIRQ 32 |
paul@4 | 57 | #define MAX_USBIRQ_VBUSIRQ 64 |
paul@4 | 58 | |
paul@0 | 59 | #define MAX_USBCTL_PWRDOWN 16 |
paul@0 | 60 | #define MAX_USBCTL_CHIPRES 32 |
paul@0 | 61 | |
paul@0 | 62 | #define MAX_PINCTL_POSINT_LOW 0 |
paul@0 | 63 | #define MAX_PINCTL_POSINT_HIGH 4 |
paul@0 | 64 | #define MAX_PINCTL_INTLEVEL_EDGE 0 |
paul@0 | 65 | #define MAX_PINCTL_INTLEVEL_LEVEL 8 |
paul@0 | 66 | #define MAX_PINCTL_FDUPSPI_HALF 0 |
paul@0 | 67 | #define MAX_PINCTL_FDUPSPI_FULL 16 |
paul@0 | 68 | |
paul@0 | 69 | #define MAX_MODE_PERIPHERAL 0 |
paul@0 | 70 | #define MAX_MODE_HOST 1 |
paul@0 | 71 | #define MAX_MODE_SEPIRQ_OFF 0 |
paul@0 | 72 | #define MAX_MODE_SEPIRQ_ON 16 |
paul@0 | 73 | #define MAX_MODE_DMPULLDN 64 |
paul@0 | 74 | #define MAX_MODE_DPPULLDN 128 |
paul@0 | 75 | |
paul@0 | 76 | #define max_reg(n) ((uint8_t) (n << 3)) |
paul@0 | 77 | #define max_reg_read(n) (max_reg(n) | MAX_REG_READ) |
paul@0 | 78 | #define max_reg_write(n) (max_reg(n) | MAX_REG_WRITE) |
paul@0 | 79 | |
paul@0 | 80 | struct timespec tCSS = {0, 20}, |
paul@0 | 81 | tL = {0, 30}, |
paul@0 | 82 | tCSW = {0, 200}, |
paul@0 | 83 | tCL = {0, 17}, |
paul@0 | 84 | tCH = {0, 17}, |
paul@0 | 85 | tDS = {0, 5}, |
paul@0 | 86 | tDH = {0, 10}, |
paul@0 | 87 | tDO = {0, 15}, |
paul@0 | 88 | tDI = {0, 15}, |
paul@0 | 89 | tON = {0, 4}, |
paul@0 | 90 | tRESET = {0, 200}, |
paul@0 | 91 | tTEST = {0, 100}; |
paul@0 | 92 | |
paul@0 | 93 | void spi_begin() |
paul@0 | 94 | { |
paul@0 | 95 | CLR(MAX_SS); |
paul@0 | 96 | nanosleep(&tL, NULL); /* tCSS is the minimum, but tL is more conservative */ |
paul@0 | 97 | } |
paul@0 | 98 | |
paul@0 | 99 | void spi_end() |
paul@0 | 100 | { |
paul@0 | 101 | SET(MAX_SS); |
paul@0 | 102 | nanosleep(&tCSW, NULL); |
paul@0 | 103 | } |
paul@0 | 104 | |
paul@0 | 105 | /** |
paul@0 | 106 | * Send the given value via MOSI while receiving a value via MISO. |
paul@0 | 107 | * This requires full-duplex SPI and will produce a status value for the first |
paul@0 | 108 | * value sent (the command). |
paul@0 | 109 | */ |
paul@0 | 110 | uint8_t spi_sendrecv(uint8_t v) |
paul@0 | 111 | { |
paul@0 | 112 | uint8_t result = 0; |
paul@0 | 113 | uint8_t mask; |
paul@0 | 114 | |
paul@0 | 115 | for (mask = 0x80; mask; mask >>= 1) |
paul@0 | 116 | { |
paul@0 | 117 | if (v & mask) |
paul@0 | 118 | { |
paul@0 | 119 | printf("1"); |
paul@0 | 120 | SET(MAX_MOSI); |
paul@0 | 121 | } |
paul@0 | 122 | else |
paul@0 | 123 | { |
paul@0 | 124 | printf("0"); |
paul@0 | 125 | CLR(MAX_MOSI); |
paul@0 | 126 | } |
paul@0 | 127 | |
paul@0 | 128 | /* Wait for stable output signal. */ |
paul@0 | 129 | |
paul@0 | 130 | nanosleep(&tDS, NULL); |
paul@0 | 131 | |
paul@0 | 132 | SET(MAX_SCLK); |
paul@0 | 133 | |
paul@0 | 134 | if (PIN(MAX_MISO)) |
paul@0 | 135 | result |= mask; |
paul@0 | 136 | |
paul@0 | 137 | nanosleep(&tCH, NULL); |
paul@0 | 138 | CLR(MAX_SCLK); |
paul@0 | 139 | nanosleep(&tCL, NULL); |
paul@0 | 140 | } |
paul@0 | 141 | |
paul@0 | 142 | printf("\n"); |
paul@0 | 143 | return result; |
paul@0 | 144 | } |
paul@0 | 145 | |
paul@6 | 146 | uint8_t max_read(uint8_t reg, uint8_t *status) |
paul@6 | 147 | { |
paul@6 | 148 | uint8_t result = 0, tmpstatus = 0; |
paul@6 | 149 | |
paul@6 | 150 | tmpstatus = 0; |
paul@6 | 151 | |
paul@6 | 152 | spi_begin(); |
paul@6 | 153 | tmpstatus = spi_sendrecv(max_reg_read(reg)); |
paul@6 | 154 | result = spi_sendrecv(0); |
paul@6 | 155 | spi_end(); |
paul@6 | 156 | |
paul@6 | 157 | if (status != NULL) |
paul@6 | 158 | *status = tmpstatus; |
paul@6 | 159 | |
paul@6 | 160 | return result; |
paul@6 | 161 | } |
paul@6 | 162 | |
paul@6 | 163 | uint8_t max_write(uint8_t reg, uint8_t value) |
paul@6 | 164 | { |
paul@6 | 165 | uint8_t status = 0; |
paul@6 | 166 | |
paul@6 | 167 | spi_begin(); |
paul@6 | 168 | status = spi_sendrecv(max_reg_write(reg)); |
paul@6 | 169 | spi_sendrecv(value); |
paul@6 | 170 | spi_end(); |
paul@6 | 171 | |
paul@6 | 172 | return status; |
paul@6 | 173 | } |
paul@6 | 174 | |
paul@3 | 175 | void reset() |
paul@3 | 176 | { |
paul@3 | 177 | SET(MAX_RESET); |
paul@3 | 178 | nanosleep(&tRESET, NULL); |
paul@3 | 179 | CLR(MAX_RESET); |
paul@3 | 180 | } |
paul@3 | 181 | |
paul@3 | 182 | void chipreset() |
paul@3 | 183 | { |
paul@3 | 184 | printf("Resetting...\n"); |
paul@6 | 185 | max_write(MAX_REG_USBCTL, MAX_USBCTL_CHIPRES); |
paul@3 | 186 | |
paul@3 | 187 | printf("Clearing the reset...\n"); |
paul@6 | 188 | max_write(MAX_REG_USBCTL, 0); |
paul@3 | 189 | } |
paul@3 | 190 | |
paul@4 | 191 | uint8_t check() |
paul@4 | 192 | { |
paul@6 | 193 | uint8_t oscillator; |
paul@4 | 194 | |
paul@6 | 195 | oscillator = max_read(MAX_REG_USBIRQ, NULL); |
paul@4 | 196 | |
paul@4 | 197 | return (oscillator & ~(MAX_USBIRQ_NOVBUSIRQ | MAX_USBIRQ_VBUSIRQ)) == MAX_USBIRQ_OSCOKIRQ; |
paul@4 | 198 | } |
paul@4 | 199 | |
paul@0 | 200 | int main(int argc, char *argv[]) |
paul@0 | 201 | { |
paul@0 | 202 | uint8_t status = 0, revision = 0, hrsl = 0; |
paul@0 | 203 | |
paul@0 | 204 | if (ubb_open(0) < 0) { |
paul@0 | 205 | perror("ubb_open"); |
paul@0 | 206 | return 1; |
paul@0 | 207 | } |
paul@0 | 208 | |
paul@0 | 209 | ubb_power(1); |
paul@0 | 210 | printf("Power on.\n"); |
paul@0 | 211 | |
paul@0 | 212 | OUT(MAX_SS); |
paul@0 | 213 | OUT(MAX_MOSI); |
paul@0 | 214 | OUT(MAX_SCLK); |
paul@0 | 215 | OUT(MAX_RESET); |
paul@0 | 216 | IN(MAX_INT); |
paul@0 | 217 | IN(MAX_MISO); |
paul@0 | 218 | |
paul@0 | 219 | /* Initialise SPI. */ |
paul@0 | 220 | /* Set SS to 1 (or SS~ to 0). */ |
paul@0 | 221 | |
paul@0 | 222 | SET(MAX_SS); |
paul@0 | 223 | CLR(MAX_MOSI); |
paul@0 | 224 | CLR(MAX_SCLK); |
paul@0 | 225 | CLR(MAX_RESET); |
paul@0 | 226 | |
paul@0 | 227 | /* Initialise the MAX3421E. */ |
paul@0 | 228 | |
paul@0 | 229 | /* Set full-duplex, interrupt signalling. */ |
paul@0 | 230 | |
paul@0 | 231 | printf("Setting pin control...\n"); |
paul@6 | 232 | max_write(MAX_REG_PINCTL, MAX_PINCTL_INTLEVEL_LEVEL | MAX_PINCTL_FDUPSPI_FULL); |
paul@0 | 233 | |
paul@3 | 234 | reset(); |
paul@3 | 235 | chipreset(); |
paul@4 | 236 | printf("Ready? %d\n", check()); |
paul@0 | 237 | |
paul@0 | 238 | /* Set host mode. */ |
paul@0 | 239 | |
paul@0 | 240 | printf("Setting mode...\n"); |
paul@6 | 241 | status = max_write(MAX_REG_MODE, MAX_MODE_HOST | MAX_MODE_SEPIRQ_OFF | MAX_MODE_DMPULLDN | MAX_MODE_DPPULLDN); |
paul@6 | 242 | printf("Status = %x\n", status); |
paul@4 | 243 | printf("Ready? %d\n", check()); |
paul@0 | 244 | |
paul@0 | 245 | /* Read from the REVISION register. */ |
paul@0 | 246 | |
paul@0 | 247 | printf("Reading...\n"); |
paul@6 | 248 | revision = max_read(MAX_REG_REVISION, &status); |
paul@0 | 249 | printf("Status = %x\n", status); |
paul@0 | 250 | printf("Revision = %x\n", revision); |
paul@4 | 251 | printf("Ready? %d\n", check()); |
paul@0 | 252 | |
paul@0 | 253 | printf("HRSL...\n"); |
paul@6 | 254 | hrsl = max_read(MAX_REG_HRSL, &status); |
paul@0 | 255 | printf("Status = %x\n", status); |
paul@0 | 256 | printf("HRSL = %x\n", hrsl); |
paul@4 | 257 | printf("Ready? %d\n", check()); |
paul@0 | 258 | |
paul@0 | 259 | printf("Closing...\n"); |
paul@0 | 260 | ubb_close(0); |
paul@0 | 261 | |
paul@0 | 262 | return 0; |
paul@0 | 263 | } |