1 /* 2 * Ben NanoNote and Arduino USB Host shield communication. 3 * 4 * Copyright 2013 Paul Boddie 5 * 6 * SPI functions derived from those in lib/atben.c by Werner Almesberger: 7 * 8 * Copyright 2010-2011 Werner Almesberger 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 */ 15 16 #include <ubb/ubb.h> 17 #include <stdio.h> 18 #include <signal.h> 19 #include <stdlib.h> 20 #include <usb.h> 21 #include <unistd.h> 22 #include <string.h> 23 #include <endian.h> 24 25 /* Found in Python's asdl.h. */ 26 27 #ifndef __cplusplus 28 typedef enum {false, true} bool; 29 #endif 30 31 /* Initialisation states. */ 32 33 typedef enum 34 { 35 MAX_DEVSTATE_INIT = 0, 36 MAX_DEVSTATE_CONNECTED = 1, 37 MAX_DEVSTATE_RESET = 2, 38 MAX_DEVSTATE_INSPECTED = 3, 39 MAX_DEVSTATE_RESET_AGAIN = 4, 40 MAX_DEVSTATE_READY = 5 41 } max_devstate; 42 43 /* Device details. */ 44 45 typedef struct 46 { 47 bool in_toggle, out_toggle; 48 struct usb_device_descriptor desc; 49 uint8_t address; 50 } max_device; 51 52 static uint16_t next_address = 1; 53 54 /* Pin assignments: 55 * 56 * Sniffer UBB Shield 57 * ------- ---- ------ 58 * DAT2 DAT2 9 (INT) 59 * CD DAT3 10 (SS) 60 * CMD CMD 7 (RESET) 61 * VCC VDD VIN 62 * CLK CLK 13 (SCLK) 63 * GND GND GND 64 * DAT0 DAT0 11 (MOSI) 65 * DAT1 DAT1 12 (MISO) 66 * 8 (GPX) (not assigned) 67 */ 68 69 #define MAX_RESET UBB_CMD 70 #define MAX_SCLK UBB_CLK 71 #define MAX_MOSI UBB_DAT0 72 #define MAX_MISO UBB_DAT1 73 #define MAX_INT UBB_DAT2 74 #define MAX_SS UBB_DAT3 75 76 /* MAX3421E definitions. */ 77 78 #define MAX_REG_READ 0x00 79 #define MAX_REG_WRITE 0x02 80 81 #define MAX_REG_RCVFIFO 1 82 #define MAX_REG_SNDFIFO 2 83 #define MAX_REG_SUDFIFO 4 84 #define MAX_REG_RCVBC 6 85 #define MAX_REG_SNDBC 7 86 #define MAX_REG_USBIRQ 13 87 #define MAX_REG_USBIEN 14 88 #define MAX_REG_USBCTL 15 89 #define MAX_REG_CPUCTL 16 90 #define MAX_REG_PINCTL 17 91 #define MAX_REG_REVISION 18 92 #define MAX_REG_HIRQ 25 93 #define MAX_REG_HIEN 26 94 #define MAX_REG_MODE 27 95 #define MAX_REG_PERADDR 28 96 #define MAX_REG_HCTL 29 97 #define MAX_REG_HXFR 30 98 #define MAX_REG_HRSL 31 99 100 #define MAX_USBIRQ_OSCOKIRQ 1 101 #define MAX_USBIRQ_NOVBUSIRQ 32 102 #define MAX_USBIRQ_VBUSIRQ 64 103 104 #define MAX_USBCTL_PWRDOWN 16 105 #define MAX_USBCTL_CHIPRES 32 106 107 #define MAX_CPUCTL_IE 1 108 109 #define MAX_PINCTL_POSINT_LOW 0 110 #define MAX_PINCTL_POSINT_HIGH 4 111 #define MAX_PINCTL_INTLEVEL_EDGE 0 112 #define MAX_PINCTL_INTLEVEL_LEVEL 8 113 #define MAX_PINCTL_FDUPSPI_HALF 0 114 #define MAX_PINCTL_FDUPSPI_FULL 16 115 116 #define MAX_HIRQ_BUSEVENTIRQ 1 117 #define MAX_HIRQ_RWUIRQ 2 118 #define MAX_HIRQ_RCVDAVIRQ 4 119 #define MAX_HIRQ_SNDBAVIRQ 8 120 #define MAX_HIRQ_SUSDNIRQ 16 121 #define MAX_HIRQ_CONDETIRQ 32 122 #define MAX_HIRQ_FRAMEIRQ 64 123 #define MAX_HIRQ_HXFRDNIRQ 128 124 125 #define MAX_HIEN_BUSEVENTIE 1 126 #define MAX_HIEN_CONDETIE 32 127 #define MAX_HIEN_FRAMEIE 64 128 129 #define MAX_MODE_PERIPHERAL 0 130 #define MAX_MODE_HOST 1 131 #define MAX_MODE_LOWSPEED 2 132 #define MAX_MODE_SOFKAENAB 8 133 #define MAX_MODE_SEPIRQ_OFF 0 134 #define MAX_MODE_SEPIRQ_ON 16 135 #define MAX_MODE_DMPULLDN 64 136 #define MAX_MODE_DPPULLDN 128 137 138 #define MAX_MODE_HOST_ENABLED MAX_MODE_HOST | MAX_MODE_SEPIRQ_OFF | MAX_MODE_DMPULLDN | MAX_MODE_DPPULLDN 139 #define MAX_MODE_HOST_FULLSPEED MAX_MODE_HOST_ENABLED 140 #define MAX_MODE_HOST_LOWSPEED MAX_MODE_HOST_ENABLED | MAX_MODE_LOWSPEED 141 142 #define MAX_HCTL_BUSRST 1 143 #define MAX_HCTL_SAMPLEBUS 4 144 #define MAX_HCTL_RCVTOG0 16 145 #define MAX_HCTL_RCVTOG1 32 146 #define MAX_HCTL_SNDTOG0 64 147 #define MAX_HCTL_SNDTOG1 128 148 149 #define MAX_HXFR_SETUP 16 150 #define MAX_HXFR_OUTNIN 32 151 #define MAX_HXFR_HS 128 152 153 #define MAX_HRSL_JSTATUS 128 154 #define MAX_HRSL_KSTATUS 64 155 #define MAX_HRSL_SNDTOGRD 32 156 #define MAX_HRSL_RCVTOGRD 16 157 #define MAX_HRSL_HRSLT 15 158 159 #define max_reg(n) ((uint8_t) (n << 3)) 160 #define max_reg_read(n) (max_reg(n) | MAX_REG_READ) 161 #define max_reg_write(n) (max_reg(n) | MAX_REG_WRITE) 162 163 #define usb_descriptor_type(n) ((uint16_t) (n << 8)) 164 165 void spi_begin() 166 { 167 CLR(MAX_SS); 168 } 169 170 void spi_end() 171 { 172 SET(MAX_SS); 173 } 174 175 /** 176 * Send the given value via MOSI while receiving a value via MISO. 177 * This requires full-duplex SPI and will produce a status value for the first 178 * value sent (the command). 179 */ 180 uint8_t spi_sendrecv(uint8_t v) 181 { 182 uint8_t result = 0; 183 uint8_t mask; 184 185 for (mask = 0x80; mask; mask >>= 1) 186 { 187 if (v & mask) 188 { 189 #ifdef DEBUG 190 printf("1"); 191 #endif 192 SET(MAX_MOSI); 193 } 194 else 195 { 196 #ifdef DEBUG 197 printf("0"); 198 #endif 199 CLR(MAX_MOSI); 200 } 201 202 /* Wait for stable output signal. */ 203 204 SET(MAX_SCLK); 205 206 if (PIN(MAX_MISO)) 207 result |= mask; 208 209 CLR(MAX_SCLK); 210 } 211 212 #ifdef DEBUG 213 printf("\n"); 214 #endif 215 return result; 216 } 217 218 uint8_t max_read(uint8_t reg, uint8_t *status) 219 { 220 uint8_t result = 0, tmpstatus = 0; 221 222 tmpstatus = 0; 223 224 spi_begin(); 225 tmpstatus = spi_sendrecv(max_reg_read(reg)); 226 result = spi_sendrecv(0); 227 spi_end(); 228 229 if (status != NULL) 230 *status = tmpstatus; 231 232 return result; 233 } 234 235 uint8_t max_write(uint8_t reg, uint8_t value) 236 { 237 uint8_t status = 0; 238 239 spi_begin(); 240 status = spi_sendrecv(max_reg_write(reg)); 241 spi_sendrecv(value); 242 spi_end(); 243 244 return status; 245 } 246 247 /** 248 * Return whether data can be sent. 249 */ 250 bool max_can_send(uint8_t *status) 251 { 252 if (status == NULL) 253 return max_read(MAX_REG_HIRQ, NULL) & MAX_HIRQ_SNDBAVIRQ; 254 else 255 return *status & MAX_HIRQ_SNDBAVIRQ; 256 } 257 258 /** 259 * Set the sending data toggle. 260 */ 261 void max_set_send_toggle(bool toggle) 262 { 263 max_write(MAX_REG_HCTL, toggle ? MAX_HCTL_SNDTOG1 : MAX_HCTL_SNDTOG0); 264 } 265 266 /** 267 * Return the sending data toggle. 268 */ 269 bool max_get_send_toggle() 270 { 271 return (max_read(MAX_REG_HRSL, NULL) & MAX_HRSL_SNDTOGRD) != 0; 272 } 273 274 /** 275 * Set the receiving data toggle. 276 */ 277 void max_set_recv_toggle(bool toggle) 278 { 279 max_write(MAX_REG_HCTL, toggle ? MAX_HCTL_RCVTOG1 : MAX_HCTL_RCVTOG0); 280 } 281 282 /** 283 * Return the receiving data toggle. 284 */ 285 bool max_get_recv_toggle() 286 { 287 return (max_read(MAX_REG_HRSL, NULL) & MAX_HRSL_RCVTOGRD) != 0; 288 } 289 290 /** 291 * Wait for handshake/timeout after a transfer. 292 */ 293 uint8_t max_wait_transfer(uint8_t status) 294 { 295 while (!(status & MAX_HIRQ_HXFRDNIRQ)) 296 { 297 status = max_read(MAX_REG_HIRQ, NULL); 298 } 299 300 max_write(MAX_REG_HIRQ, MAX_HIRQ_HXFRDNIRQ); 301 return max_read(MAX_REG_HIRQ, NULL); 302 } 303 304 /** 305 * Write the given data to the FIFO. 306 */ 307 void max_write_fifo(uint8_t endpoint, uint8_t *data, uint8_t len) 308 { 309 uint8_t count; 310 311 for (count = 0; count < len; count++) 312 { 313 max_write(endpoint ? MAX_REG_SNDFIFO : MAX_REG_SUDFIFO, data[count]); 314 } 315 316 if (endpoint) 317 max_write(MAX_REG_SNDBC, len); 318 } 319 320 /** 321 * Read the data from the FIFO. 322 */ 323 void max_read_fifo(uint8_t **data, uint8_t *len, uint8_t *datalimit) 324 { 325 uint8_t count, received = max_read(MAX_REG_RCVBC, NULL); 326 printf("Received %d bytes.\n", received); 327 328 *len += received; 329 330 for (count = 0; (count < received) && (*data < datalimit); count++) 331 { 332 *((*data)++) = max_read(MAX_REG_RCVFIFO, NULL); 333 } 334 } 335 336 /** 337 * Send a request to the given endpoint, using the supplied data payload with 338 * the given length, indicating the preserved toggle state of the endpoint 339 * (which will be updated). 340 */ 341 uint8_t max_send(uint8_t endpoint, uint8_t *data, uint8_t len, bool *toggle) 342 { 343 uint8_t status, hrsl = 0; 344 345 max_write_fifo(endpoint, data, len); 346 347 max_set_send_toggle(*toggle); 348 349 /* Initiate the transfer. */ 350 351 do 352 { 353 status = max_write(MAX_REG_HXFR, endpoint | MAX_HXFR_OUTNIN); 354 status = max_wait_transfer(status); 355 356 /* Test for usable data. */ 357 358 if (status & MAX_HIRQ_SNDBAVIRQ) 359 { 360 hrsl = max_read(MAX_REG_HRSL, &status); 361 362 if (!(hrsl & MAX_HRSL_HRSLT)) 363 break; 364 } 365 } 366 while (true); 367 368 *toggle = max_get_send_toggle(); 369 370 return status; 371 } 372 373 /** 374 * Make a request for data from the given endpoint, collecting it in the 375 * supplied buffer with the given length, indicating the preserved toggle state 376 * of the endpoint (which will be updated). The length will be updated to 377 * indicate the total length of the received data. 378 */ 379 bool max_recv(uint8_t endpoint, uint8_t *data, uint8_t *len, bool *toggle) 380 { 381 uint8_t *datalimit = data + *len; 382 uint8_t status, hrsl = 0; 383 uint16_t attempt = 1024; 384 385 max_set_recv_toggle(*toggle); 386 387 /* Initiate the transfer. */ 388 389 do 390 { 391 status = max_write(MAX_REG_HXFR, endpoint); 392 status = max_wait_transfer(status); 393 394 /* Test for usable data. */ 395 396 hrsl = max_read(MAX_REG_HRSL, &status); 397 398 attempt--; 399 } 400 while ((hrsl & MAX_HRSL_HRSLT) && attempt); 401 402 if (!attempt) 403 { 404 printf("HRSL is %x\n", hrsl); 405 return false; 406 } 407 408 while (status & MAX_HIRQ_RCVDAVIRQ) 409 { 410 max_read_fifo(&data, len, datalimit); 411 412 /* Indicate that all data has been read. */ 413 414 max_write(MAX_REG_HIRQ, MAX_HIRQ_RCVDAVIRQ); 415 status = max_read(MAX_REG_HIRQ, NULL); 416 } 417 418 *toggle = max_get_recv_toggle(); 419 420 return true; 421 } 422 423 /** 424 * Send a control request consisting of the given setup data. 425 */ 426 uint8_t max_control(uint8_t *setup) 427 { 428 uint8_t status, hrsl; 429 430 max_write_fifo(0, setup, 8); 431 432 /* Initiate the transfer. */ 433 434 do 435 { 436 status = max_write(MAX_REG_HXFR, MAX_HXFR_SETUP); 437 status = max_wait_transfer(status); 438 hrsl = max_read(MAX_REG_HRSL, &status); 439 } 440 while (hrsl & MAX_HRSL_HRSLT); 441 442 return status; 443 } 444 445 bool max_control_input(uint8_t *data, uint8_t *len, max_device *device) 446 { 447 device->in_toggle = true; 448 return max_recv(0, data, len, &device->in_toggle); 449 } 450 451 /** 452 * Perform a status transaction as part of a larger control transaction. 453 * The out parameter is used to indicate the kind of status transfer to be 454 * performed and should be the inverse of the control transfer direction. 455 */ 456 uint8_t max_control_status(bool out) 457 { 458 uint8_t status, hrsl; 459 460 do 461 { 462 status = max_write(MAX_REG_HXFR, MAX_HXFR_HS | (out ? MAX_HXFR_OUTNIN : 0)); 463 status = max_wait_transfer(status); 464 hrsl = max_read(MAX_REG_HRSL, &status); 465 } 466 while (hrsl & MAX_HRSL_HRSLT); 467 468 return status; 469 } 470 471 void chipreset() 472 { 473 printf("Resetting...\n"); 474 max_write(MAX_REG_USBCTL, MAX_USBCTL_CHIPRES); 475 476 printf("Clearing the reset...\n"); 477 max_write(MAX_REG_USBCTL, 0); 478 } 479 480 uint8_t check() 481 { 482 uint8_t oscillator; 483 484 oscillator = max_read(MAX_REG_USBIRQ, NULL); 485 486 return (oscillator & ~(MAX_USBIRQ_NOVBUSIRQ | MAX_USBIRQ_VBUSIRQ)) == MAX_USBIRQ_OSCOKIRQ; 487 } 488 489 uint8_t wait() 490 { 491 uint16_t timeout = 1024; 492 493 /* Wait for the oscillator before performing USB activity. */ 494 495 printf("Waiting...\n"); 496 497 while ((timeout > 0) && (!check())) 498 { 499 timeout--; 500 } 501 502 printf("Iterations remaining: %d\n", timeout); 503 504 return timeout; 505 } 506 507 /** 508 * Return whether the bus is ready to be sampled. The application note claims 509 * that the SAMPLEBUS bit is cleared, but this does not seem to be the case. 510 */ 511 uint8_t samplebusready() 512 { 513 uint8_t result; 514 515 result = max_read(MAX_REG_HCTL, NULL); 516 return result & MAX_HCTL_SAMPLEBUS; 517 } 518 519 void samplebus() 520 { 521 max_write(MAX_REG_HCTL, MAX_HCTL_SAMPLEBUS); 522 while (!samplebusready()); 523 } 524 525 /** 526 * Handle the connection or disconnection of a device, returning true if the 527 * device is now connected or false otherwise. If the device is connected, a 528 * bus reset is performed. 529 */ 530 bool devicechanged() 531 { 532 uint8_t hrsl, mode; 533 534 hrsl = max_read(MAX_REG_HRSL, NULL); 535 mode = max_read(MAX_REG_MODE, NULL); 536 537 if ((hrsl & MAX_HRSL_JSTATUS) && (hrsl & MAX_HRSL_KSTATUS)) 538 { 539 printf("Bad device status.\n"); 540 } 541 else if (!(hrsl & MAX_HRSL_JSTATUS) && !(hrsl & MAX_HRSL_KSTATUS)) 542 { 543 printf("Device disconnected.\n"); 544 } 545 else 546 { 547 printf("Device connected.\n"); 548 549 /* Low speed device when J and lowspeed have the same level. 550 Since J and K should have opposing levels, K can be tested when 551 lowspeed is low. */ 552 553 if (((hrsl & MAX_HRSL_JSTATUS) && (mode & MAX_MODE_LOWSPEED)) || 554 ((hrsl & MAX_HRSL_KSTATUS) && !(mode & MAX_MODE_LOWSPEED))) 555 { 556 printf("Device is low speed.\n"); 557 max_write(MAX_REG_MODE, MAX_MODE_HOST_LOWSPEED); 558 } 559 else 560 { 561 printf("Device is full speed.\n"); 562 max_write(MAX_REG_MODE, MAX_MODE_HOST_FULLSPEED); 563 } 564 565 /* Reset the device. */ 566 567 max_write(MAX_REG_HCTL, MAX_HCTL_BUSRST); 568 return true; 569 } 570 571 return false; 572 } 573 574 /** 575 * Initialise a USB control request setup payload. 576 */ 577 void setup_packet(uint8_t *setup, uint8_t request_type, uint8_t request, uint16_t value, uint16_t index, uint16_t length) 578 { 579 setup[0] = request_type; 580 setup[1] = request; 581 setup[2] = value & 0xff; 582 setup[3] = value >> 8; 583 setup[4] = index & 0xff; 584 setup[5] = index >> 8; 585 setup[6] = length & 0xff; 586 setup[7] = length >> 8; 587 } 588 589 /** 590 * Perform initialisation on a device, obtaining the device details and storing 591 * this information in the device structure, returning true if successful and 592 * false otherwise. 593 */ 594 bool max_init_device(max_device *device) 595 { 596 uint8_t data[64], len = 64, setup[8]; 597 598 printf("Sending control request to address 0, endpoint 0...\n"); 599 600 max_write(MAX_REG_PERADDR, 0); 601 602 /* Send a "get descriptor" request for the device descriptor. */ 603 604 setup_packet(setup, USB_ENDPOINT_IN, USB_REQ_GET_DESCRIPTOR, usb_descriptor_type(USB_DT_DEVICE), 0, USB_DT_DEVICE_SIZE); 605 max_control(setup); 606 if (!max_control_input(data, &len, device)) 607 return false; 608 max_control_status(true); 609 610 if (len >= sizeof(struct usb_device_descriptor)) 611 { 612 memcpy(&device->desc, data, sizeof(struct usb_device_descriptor)); 613 device->desc.bcdUSB = le16toh(device->desc.bcdUSB); 614 device->desc.idVendor = le16toh(device->desc.idVendor); 615 device->desc.idProduct = le16toh(device->desc.idProduct); 616 device->desc.bcdDevice = le16toh(device->desc.bcdDevice); 617 618 printf("bLength: %d\n", device->desc.bLength); 619 printf("bDescriptorType: %d\n", device->desc.bDescriptorType); 620 printf("bcdUSB: %04x\n", device->desc.bcdUSB); 621 printf("bDeviceClass: %d\n", device->desc.bDeviceClass); 622 printf("bDeviceSubClass: %d\n", device->desc.bDeviceSubClass); 623 printf("bDeviceProtocol: %d\n", device->desc.bDeviceProtocol); 624 printf("bMaxPacketSize0: %d\n", device->desc.bMaxPacketSize0); 625 printf("idVendor: %04x\n", device->desc.idVendor); 626 printf("idProduct: %04x\n", device->desc.idProduct); 627 printf("bcdDevice: %04x\n", device->desc.bcdDevice); 628 printf("iManufacturer: %d\n", device->desc.iManufacturer); 629 printf("iProduct: %d\n", device->desc.iProduct); 630 printf("iSerialNumber: %d\n", device->desc.iSerialNumber); 631 printf("bNumConfigurations: %d\n", device->desc.bNumConfigurations); 632 633 /* Reset the device. */ 634 635 max_write(MAX_REG_HCTL, MAX_HCTL_BUSRST); 636 return true; 637 } 638 639 return false; 640 } 641 642 /** 643 * Assign a new address to the given device. 644 */ 645 void max_set_address(max_device *device) 646 { 647 uint8_t setup[8]; 648 649 max_write(MAX_REG_PERADDR, 0); 650 651 device->address = next_address++; 652 653 printf("Setting device address to %d...\n", device->address); 654 655 setup_packet(setup, USB_ENDPOINT_OUT, USB_REQ_SET_ADDRESS, device->address, 0, 0); 656 max_control(setup); 657 max_control_status(false); 658 } 659 660 661 void max_get_descriptor(max_device *device) 662 { 663 uint8_t data[64], len = 64, setup[8]; 664 struct usb_string_descriptor *desc; 665 uint16_t *lang; 666 667 printf("Sending descriptor request to address %d, endpoint 0...\n", device->address); 668 669 max_write(MAX_REG_PERADDR, device->address); 670 671 setup_packet(setup, USB_ENDPOINT_IN, USB_REQ_GET_DESCRIPTOR, usb_descriptor_type(USB_DT_STRING), 0, 64); 672 max_control(setup); 673 if (!max_control_input(data, &len, device)) 674 { 675 printf("Failed.\n"); 676 return; 677 } 678 max_control_status(true); 679 680 if (len >= sizeof(struct usb_string_descriptor)) 681 { 682 desc = (struct usb_string_descriptor *) data; 683 684 printf("bLength: %d\n", desc->bLength); 685 printf("bDescriptorType: %d\n", desc->bDescriptorType); 686 687 for (lang = desc->wData; lang < (uint16_t *) (data + desc->bLength); lang++) 688 { 689 printf("wLangId: %04x\n", le16toh(*lang)); 690 } 691 } 692 } 693 694 /** 695 * Handle termination of the process. 696 */ 697 void shutdown(int signum) 698 { 699 printf("Closing...\n"); 700 ubb_close(0); 701 exit(1); 702 } 703 704 int main(int argc, char *argv[]) 705 { 706 uint8_t status = 0, revision = 0; 707 uint16_t count; 708 bool bus_event, data_event, suspended_event, connection_event, frame_event; 709 max_device device; 710 max_devstate devstate = MAX_DEVSTATE_INIT; 711 712 device.in_toggle = false; 713 device.out_toggle = false; 714 715 signal(SIGINT, &shutdown); 716 717 if (ubb_open(0) < 0) { 718 perror("ubb_open"); 719 return 1; 720 } 721 722 ubb_power(1); 723 printf("Power on.\n"); 724 725 OUT(MAX_SS); 726 OUT(MAX_MOSI); 727 OUT(MAX_SCLK); 728 OUT(MAX_RESET); 729 IN(MAX_INT); 730 IN(MAX_MISO); 731 732 /* Initialise SPI. */ 733 /* Set SS# to 1. */ 734 735 SET(MAX_SS); 736 CLR(MAX_MOSI); 737 CLR(MAX_SCLK); 738 SET(MAX_RESET); 739 740 /* Initialise the MAX3421E. */ 741 742 /* Set full-duplex, interrupt signalling. */ 743 744 printf("Setting pin control...\n"); 745 max_write(MAX_REG_PINCTL, MAX_PINCTL_INTLEVEL_LEVEL | MAX_PINCTL_FDUPSPI_FULL); 746 747 chipreset(); 748 printf("Ready? %d\n", wait()); 749 750 /* Check various registers. */ 751 752 printf("Mode: %x\n", max_read(MAX_REG_MODE, &status)); 753 printf("IRQ: %x\n", max_read(MAX_REG_HIRQ, &status)); 754 755 /* Set host mode. */ 756 757 printf("Setting mode...\n"); 758 status = max_write(MAX_REG_MODE, MAX_MODE_HOST_ENABLED); 759 760 printf("Setting INT signalling...\n"); 761 status = max_write(MAX_REG_CPUCTL, MAX_CPUCTL_IE); 762 763 printf("Setting event signalling...\n"); 764 status = max_write(MAX_REG_HIEN, MAX_HIEN_CONDETIE | MAX_HIEN_FRAMEIE | MAX_HIEN_BUSEVENTIE); 765 766 /* Check various registers. */ 767 768 printf("Mode: %x\n", max_read(MAX_REG_MODE, &status)); 769 printf("IRQ: %x\n", max_read(MAX_REG_HIRQ, &status)); 770 printf("IE: %x\n", max_read(MAX_REG_HIEN, &status)); 771 printf("CPU: %x\n", max_read(MAX_REG_CPUCTL, &status)); 772 printf("Pin: %x\n", max_read(MAX_REG_PINCTL, &status)); 773 printf("USBIRQ: %x\n", max_read(MAX_REG_USBIRQ, &status)); 774 printf("USBIE: %x\n", max_read(MAX_REG_USBIEN, &status)); 775 776 /* Read from the REVISION register. */ 777 778 printf("Reading...\n"); 779 revision = max_read(MAX_REG_REVISION, &status); 780 printf("Revision = %x\n", revision); 781 782 /* Sample the bus for any devices that are already connected. */ 783 784 samplebus(); 785 786 if (devicechanged()) 787 { 788 devstate = MAX_DEVSTATE_CONNECTED; 789 } 790 791 /* Enter the main processing loop. */ 792 793 for (count = 0; count <= 65535; count++) 794 { 795 if (!PIN(MAX_INT)) 796 { 797 /* Obtain interrupt conditions. */ 798 799 status = max_read(MAX_REG_HIRQ, NULL); 800 801 bus_event = status & MAX_HIRQ_BUSEVENTIRQ; 802 data_event = status & MAX_HIRQ_RCVDAVIRQ; 803 suspended_event = status & MAX_HIRQ_SUSDNIRQ; 804 connection_event = status & MAX_HIRQ_CONDETIRQ; 805 frame_event = status & MAX_HIRQ_FRAMEIRQ; 806 807 #ifdef DEBUG 808 if (bus_event) printf("Bus "); 809 if (data_event) printf("Data "); 810 if (suspended_event) printf("Suspended "); 811 if (connection_event) printf("Connection "); 812 if (frame_event) printf("Frame "); 813 printf("\n"); 814 #endif 815 816 /* Acknowledge the interrupts. */ 817 818 max_write(MAX_REG_HIRQ, status); 819 820 /* Detect device connection/disconnection. */ 821 822 if ((devstate == MAX_DEVSTATE_INIT) && connection_event && devicechanged()) 823 { 824 devstate = MAX_DEVSTATE_CONNECTED; 825 printf("CONNECTED\n"); 826 } 827 828 /* Handle device reset initiation. */ 829 830 else if ((devstate == MAX_DEVSTATE_CONNECTED) && bus_event) 831 { 832 max_write(MAX_REG_MODE, max_read(MAX_REG_MODE, NULL) | MAX_MODE_SOFKAENAB); 833 devstate = MAX_DEVSTATE_RESET; 834 printf("RESET\n"); 835 } 836 837 /* Handle device reset completion, getting device details and 838 initiating a second reset. */ 839 840 else if ((devstate == MAX_DEVSTATE_RESET) && frame_event && max_can_send(&status)) 841 { 842 if (max_init_device(&device)) 843 { 844 devstate = MAX_DEVSTATE_INSPECTED; 845 printf("INSPECTED\n"); 846 } 847 else 848 printf("FAILED: RESET -> INSPECTED\n"); 849 } 850 851 /* Handle the second device reset initiation. This is arguably 852 superfluous, since the second reset is typically done because 853 Windows aborts the device descriptor acquisition after 8 bytes 854 because it was only interested in the maximum packet size. */ 855 856 else if ((devstate == MAX_DEVSTATE_INSPECTED) && bus_event) 857 { 858 devstate = MAX_DEVSTATE_RESET_AGAIN; 859 printf("RESET AGAIN\n"); 860 } 861 862 /* Handle the second device reset completion, initiating communications. */ 863 864 else if ((devstate == MAX_DEVSTATE_RESET_AGAIN) && frame_event && max_can_send(&status)) 865 { 866 max_write(MAX_REG_MODE, max_read(MAX_REG_MODE, NULL) & ~MAX_MODE_SOFKAENAB); 867 max_set_address(&device); 868 devstate = MAX_DEVSTATE_READY; 869 max_get_descriptor(&device); 870 printf("READY\n"); 871 } 872 873 /* Handle device disconnection. */ 874 875 else if ((devstate != MAX_DEVSTATE_INIT) && connection_event) 876 { 877 devstate = MAX_DEVSTATE_INIT; 878 printf("INIT\n"); 879 } 880 } 881 } 882 883 printf("Closing...\n"); 884 ubb_close(0); 885 886 return 0; 887 }